Texas Instruments /MSP432E411Y /EPI0 /HB8CFG

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Interpret as HB8CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EPI_HB8CFG_MODE_MUX)EPI_HB8CFG_MODE 0 (EPI_HB8CFG_RDWS_2)EPI_HB8CFG_RDWS 0 (EPI_HB8CFG_WRWS_2)EPI_HB8CFG_WRWS 0EPI_HB8CFG_MAXWAIT 0 (EPI_HB8CFG_ALEHIGH)EPI_HB8CFG_ALEHIGH 0 (EPI_HB8CFG_RDHIGH)EPI_HB8CFG_RDHIGH 0 (EPI_HB8CFG_WRHIGH)EPI_HB8CFG_WRHIGH 0 (EPI_HB8CFG_XFEEN)EPI_HB8CFG_XFEEN 0 (EPI_HB8CFG_XFFEN)EPI_HB8CFG_XFFEN 0 (EPI_HB8CFG_IRDYINV)EPI_HB8CFG_IRDYINV 0 (EPI_HB8CFG_RDYEN)EPI_HB8CFG_RDYEN 0 (EPI_HB8CFG_CLKINV)EPI_HB8CFG_CLKINV 0 (EPI_HB8CFG_CLKGATEI)EPI_HB8CFG_CLKGATEI 0 (EPI_HB8CFG_CLKGATE)EPI_HB8CFG_CLKGATE

EPI_HB8CFG_WRWS=EPI_HB8CFG_WRWS_2, EPI_HB8CFG_RDWS=EPI_HB8CFG_RDWS_2, EPI_HB8CFG_MODE=EPI_HB8CFG_MODE_MUX

Description

EPI Host-Bus 8 Configuration

Fields

EPI_HB8CFG_MODE

Host Bus Sub-Mode

0 (EPI_HB8CFG_MODE_MUX): ADMUX - AD[7:0]

1 (EPI_HB8CFG_MODE_NMUX): ADNONMUX - D[7:0]

2 (EPI_HB8CFG_MODE_SRAM): Continuous Read - D[7:0]

3 (EPI_HB8CFG_MODE_FIFO): XFIFO - D[7:0]

EPI_HB8CFG_RDWS

Read Wait States

0 (EPI_HB8CFG_RDWS_2): Active RDn is 2 EPI clocks

1 (EPI_HB8CFG_RDWS_4): Active RDn is 4 EPI clocks

2 (EPI_HB8CFG_RDWS_6): Active RDn is 6 EPI clocks

3 (EPI_HB8CFG_RDWS_8): Active RDn is 8 EPI clocks

EPI_HB8CFG_WRWS

Write Wait States

0 (EPI_HB8CFG_WRWS_2): Active WRn is 2 EPI clocks

1 (EPI_HB8CFG_WRWS_4): Active WRn is 4 EPI clocks

2 (EPI_HB8CFG_WRWS_6): Active WRn is 6 EPI clocks

3 (EPI_HB8CFG_WRWS_8): Active WRn is 8 EPI clocks

EPI_HB8CFG_MAXWAIT

Maximum Wait

EPI_HB8CFG_ALEHIGH

ALE Strobe Polarity

EPI_HB8CFG_RDHIGH

READ Strobe Polarity

EPI_HB8CFG_WRHIGH

WRITE Strobe Polarity

EPI_HB8CFG_XFEEN

External FIFO EMPTY Enable

EPI_HB8CFG_XFFEN

External FIFO FULL Enable

EPI_HB8CFG_IRDYINV

Input Ready Invert

EPI_HB8CFG_RDYEN

Input Ready Enable

EPI_HB8CFG_CLKINV

Invert Output Clock Enable

EPI_HB8CFG_CLKGATEI

Clock Gated when Idle

EPI_HB8CFG_CLKGATE

Clock Gated

Links

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